Semiconductor devices such as power devices have high-voltage edge termination areas to relieve the electrical potential in the peripheral region of the semiconductor chip so that the semiconductor device can maintain the blocking capabilities to block the rated high voltages. Metal structures such as field-plates, alone or in combination with specific doping regions, are often arranged in the edge termination area to ensure that a given electrical potential is distributed and to “shape” the electrical field in this area.
Insulation of the metal structures is provided by a passivation. In addition to electrical insulation, the passivation also protects the semiconductor device against moisture and ionic contaminations, partially relieves the electrical potential and acts as a stress-mediating interlayer between the semiconductor chip and the chip moulding.
Penetration of moisture through the passivation can affect the blocking capabilities of the semiconductor device. For example, tests such as the so-called H3TRB test (High Temperature, High Humidity, Reverse Bias) often reveal corrosion of metal structures in the edge termination areas. For example, corrosion in Al-alloys which include Si and Cu can be induced by local electro-galvanic cells formed by segregations of Si and Cu. Such segregations also affect the formation of the natural Al oxide layer which usually suppresses corrosion. The corrosion of aluminium leads to the formation of Al(OH)3 having an increased volume which in turns acts on the passivation and can thus lead to stress-induced cracks in the passivation. As a result, the power devices eventually fail.
In addition, topographical structures such as steps are particularly prone to corrosion.
In view of the above, there is a need for improvement.